In this work, a dual-active bridge dc-dc converter with auxiliary-resonant commutated pole is presented. The paper focuses on the control strategies of the auxiliary-resonant commutated pole to allow soft turn-on and soft turn-off of the main switches, and thus increasing the efficiency of the converter. These strategies are developed for a high-power IGCT-based dual-active bridge dc-dc converter. Two boosting strategies, constant time magnetization and constant current boosting, are presented and tested. Besides its main objective to reduce the switching losses, the ARCP also allows balancing of the dc-link voltages in case of imbalanced loads. Strategies for boost current control and active dc-link balancing are introduced, presented and experimentally verified on a small-scale laboratory setup.

Important noise sources affecting power output waveforms of digitally controlled switch-mode (Class-D) converters/amplifiers are investigated with a 400 V hardware demonstrator utilizing gallium nitride (GaN) power transistors. First, the influence of the open-loop gains of the cascaded feedback control system on the load current signal-to-noise ratio (SNR), which is a key metric in low-noise, nanometer-precision mechatronic positioning applications, is demonstrated. With a PWM frequency of 200 kHz, the high achievable controller gains enable unprecedented SNR values in excess of 105 dB (DC–10 kHz). Next, it is shown how a real-time Kalman filter, calculated at a rate of 100 kHz and used to attenuate sensor noise, increases the amplifier output SNR by more than 10 dB. Furthermore, digital delta-sigma (noise shaping) modulation improves the SNR by 5 dB, while not affecting distortion.

The effects of key sources of total harmonic distortion (THD) in power output signals of digitally controlled switch-mode (Class-D) converters/amplifiers are analyzed. Extensive measurements with a 400 V amplifier prototype, based on gallium nitride (GaN) power transistors, support the investigations. First, the semiconductor loss model and a comprehensive circuit simulation of the converter with its closed-loop feedback system is presented to provide insights on distortion caused by junction temperature variation of the power transistors. Half-bridge interlock time is identified as a significant source of nonlinearity and hence, three simple and effective methods to reduce its deteriorating effect on THD are presented. Another important contribution to linearity arises from the closed-loop feedback controllers, which benefit from small delays and/or high converter switching frequencies. It is also shown how a Kalman filter, which can be used to significantly reduce converter output noise, deteriorates the THD due to its linear system model. Finally, a method to reduce harmonic distortion and other disturbances caused by a non-ideal DC supply is also demonstrated. By rigorously eliminating distortion sources and applying the presented compensation methods, amplifier output current THD values below −100 dB (0.001%) are achieved and experimentally verified in wide load current ranges.

In this paper, a three-wire DVR has been implemented using control algorithm based on amplitude adaptive notch filter for mitigation of voltage based power quality problems. The compensation of voltage sag, voltage swell, distortions, and imbalance imposed in the supply voltage due to various reasons is carried out using this series-connected device. The amplitude adaptive notch filter (AANF) offers advantages in extracting components like frequency, angle, and sequence components with very simple and fast responding synchronization scheme. It does not require any phase locked loop (PLL) for estimating phase angle or frequency of input signals. The fundamental positive sequence components (FPSCs) embedded in the measured signals is separated using the control algorithm and then utilized in estimation of three-phase reference load voltage. The optimization approach for tuning the PI controller’s gains is proposed in the developed control algorithm. That is, nature-inspired whale optimization algorithm (WOA) has been used due to its competitiveness compared to conventional optimization algorithms. The WOA provides the appropriate values of proportional-integration (PI) controller’s gains within less time as compared to manual tuning of PI controller. The simulation and test performance are discussed to validate the proposed control algorithm in non-ideal AC mains.

A systematic study on a gallium nitride (GaN) high-electron-mobility transistor (HEMT) based battery charger, consisting of a Vienna-type rectifier plus a dc-dc converter, reveals a common phenomenon. That is, the high switching frequency, and high di/dt and dv/dt noise inside GaN converters may induce a dc drift or low frequency distortion on sensing signals. The distortion mechanisms for different types of sensing errors are identified and practical minimization techniques are developed. Experimental results on the charger system have validated these mechanisms and corresponding approaches, showing an overall reduction of input current total harmonic distortion (THD) by up to 5 percentage points and improved dc-dc output voltage regulation accuracy. The knowledge helps engineers tackle the troublesome issues related to noise.

The hybrid switch (HyS), which is a parallel combination of the silicon (Si) insulated gate bipolar transistors (IGBTs) and the silicon carbide (SiC) metal-oxide semiconductor field-effect transistors (MOSFETs), can realize high switching frequency at a reasonable cost. In this paper, a compact HyS half-bridge power module, rated at 1200 V/200 A, was fabricated in house and fully tested for the first time. An electrothermal model of the HyS was set up in LTspice to determine the optimal gate sequence for the HyS. To minimize the HyS power loss, the turn-on gate signals are applied to the Si IGBTs and the SiC MOSFETs simultaneously while a prior turn-off period exists between the turn-off gate signals of the Si IGBTs and the SiC MOSFETs. By considering the power loss of the HyS and the junction temperature of the SiC MOSFETs, a novel index is proposed to select the optimal prior turn-off period. Based on the HyS power modules, a 5 kW air-cooling voltage source inverter and a 30 kW water-cooling voltage source inverter were developed and tested to verify the analysis.

Silicon Carbide (SiC) semiconductor technology offers the possibility to manufacture power devices with unprecedented blocking voltages in the range of 10…15 kV and superior switching characteristics, enabling switching frequencies beyond 100 kHz. To drive these 10 kV SiC devices, the power supply and the gate signal of the (high-side) gate driver require an appropriate galvanic isolation featuring a low coupling capacitance and a high du/dt ruggedness. Since at the moment no commercially available gate drivers for these specifications exist, a customized isolated gate driver is developed, which, in order to simplify the use of the high-voltage SiC devices, is intended to be integrated into a future intelligent MV SiC module. For this purpose, a highly compact isolated gate driver with an isolation voltage rating of 20 kV is implemented and tested. The realized isolation transformer of the isolated power supply shows a volume of only 3.1 cm³ and a coupling capacitance of only 2.6 pF, and has been successfully tested at 20 kV DC. Furthermore, an ultrafast overcurrent protection (OCP) circuit is implemented to protect the expensive SiC modules from destruction due to overcurrents, which e.g. could result from false turn-on of both transistors of a bridge-leg or from short circuits of the load. The OCP circuit reacts within 22 ns to a fault and measurements prove that it can successfully clear both, a hard switching fault (HSF) and even a flashover fault (FOF), where one of the two switches of a bridge-leg configuration is subject to a flashover, in less than 200 ns for a DC-link voltage of 7 kV.

In this paper, performance degradations of enhancement mode (E-mode) gallium nitride (GaN) high-electron-mobility-transistors (HEMTs) under accelerated power cycling tests are presented. For this purpose, a DC power cycling setup is designed to accelerate the aging process in a realistic manner. In order to evaluate the aging-related parameter shifts and corresponding precursors, electrical parameters are periodically monitored through a high-end curve tracer. Both the cascode device and p-GaN gate GaN devices are evaluated during these tests. In the experimental results, it is observed that the on-state resistance gradually increases in both devices. Meanwhile, the threshold voltage of the p-GaN gate GaN device gradually increases over the aging cycles and a remarkable variation in the transfer characteristics is observed. At the end of the tests, failure analyses are conducted on both devices. The cascode GaN devices show both short and open circuit failure modes, and a weak point in the drain-side bond wires is detected. For the p-GaN gate GaN device, the electrical parameter shifts indicate a possible gate degradation after the device is aged.

The emergence of wide bandgap (WBG) semiconductor devices such as silicon carbide (SiC) and gallium nitride (GaN) devices promises to revolutionize next-generation power electronics converters. Featuring high breakdown electric field, low specific on-resistance, fast switching speed, and high junction temperature capability, these devices are beneficial for the efficiency, power density, reliability, and/or cost of power electronics converters. WBG devices have been employed in some commercial and industrial products with more applications expected in near future. However, extremely fast switching and other superior characteristics of WBG devices, and high switching frequency/high voltage/high junction temperature operation, present new design challenges in gate drive and protection, packaging and layout, EMI suppression, and converter control, etc. Addressing these design and application issues is critical to the adoption, commercialization, and success of WBG-based power electronics. This special issue intends to report the latest progress in these important areas.