A multiple stage gate driver for SiC MOSFETs based on a switched resistor topology is introduced and a hardware realization is presented. The measurement setup is shown in detail to highlight the quality of the shown measurement results. The evaluation of the stage-wise driver is conducted by comparing the switch and diode peak voltages as well as peak currents with regard to the switching losses to a reference driver. The switching transients are generated using a double pulse test bench. A detailed investigation on two- and three-stage operation for both, the turn-on and turn-off events are presented. A variation of gate resistors and different timings is conducted for each stage and evaluated using the resulting measurements. It is shown that the drain-source peak voltage is reduced by 45% while maintaining equal turn-off losses. Analogously, a reduction of 51% of the diode peak voltage and a reduction of 50% of the peak reverse recovery current at the same time is feasible for equal turn-on losses.