The high voltage integrated gate-commutated thyristor (IGCT) is widely utilized in areas requiring high-power applications. The double pulse test is one of the important characterization tests for IGCT. The stray inductance of double pulse test platform determines the overvoltage amplitude when the IGCT is turned off, which can lead to errors in dynamic characteristic measurement or even damage the device. To tackle this issue, this paper introduces a novel approach to reduce stray inductance by optimizing the spatial configuration of the busbars. First, the main components of the platform are developed, including the IGCT fixture, the diode fixture and the clamp capacitor. Then, the optimization range for busbars' spatial configuration is defined, taking into account the constraints imposed by component layout, connection sequence, and insulation spacing. The particle swarm optimization (PSO) algorithm is utilized to determine the optimal spatial configuration of busbars with the minimum value of stray inductance. Finally, simulation results show that the optimized configuration reduces the overvoltage amplitudes in the double pulse test by 30%. The physical double pulse test platform incorporating the optimized spatial configuration is established, and experimental results indicate that the overvoltage amplitudes deviate by less than 6% when compared to the simulation results.