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会员 A Low Noise High PSR LDO Based on N-type Flipped Voltage Follower
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  • 2022/01/01
摘要
This paper presents a N-type flipped voltage follower (FVF) based low-dropout (LDO) regulator to provide a clean supply for analog-mixed signal blocks. The FVF LDO has a high-speed inner loop to improve the power supply rejection at mid frequency. In order to achieve low noise, the sample-and-hold noise filter and chopper stability amplifier are designed to reduce the thermal noise and flicker noise. This work is designed and simulated in 0.18 um CMOS process with 5 V VIN and 2.5 V VOUT. The integrated output noise of the LDO in the 10 Hz to 100 kHz is 6.77 µV RMS and the power supply rejection is 85.05 dB at 1 MHz.
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