In this paper, the influence of the packaging on the high voltage SiC MOSFET termination is given. First, the electric field modelling of SiC MOSFET termination with packaging considered is given. Then, by comparing the difference of the electric field distribution of the termination with and without the packaging, the influence of packaging on the chip termination is investigated. At last, the influence of the interface charge density at the interface between packaging and chip termination on the electric field distribution is discussed. This work will benefit the design of the termination of the high voltage SiC MOSFET.