In the power cycling (PC) test of Silicon Carbide (SiC) MOSFET, the precise measurement of junction temperature is the most critical step. At present, forward voltage of body diode can be an ideal choice for temperature-sensitive electrical parameter (TSEP) of junction temperature (Tj). After the end of the heating stage during PC test, there will be a certain delay, in which body diode voltage drop can not represent Tj exactly. The square-root-t (√t) method was widely used to estimate approximately Tj development for the power devices under short time transients and could derive maximum Tj (Tj_max). Since PC test circuit topology and device structure of SiC MOSFET are different from those of silicon-based devices, the fitting window used by the √t method should be also different. In this paper, the influence of test conditions and device package on the application range of the √t method is explored through finite element method (FEM) and experiments of devices with different specifications. The high power device may not be able to fit √t method in high temperature and low power condition. Most grid drive circuits use direct current from PWM rectifiers, which leads to excessive noise in the body diode voltage drop. Sometimes the fitting interval is too small and the measurement noise is too large, which makes it impossible to accurately calculate the maximum junction temperature. The transient thermal resistance curve with large fitting interval, low measurement noise and high sampling frequency can be measured by using the circuit heated by body diode. The transient thermal resistance curve is used to fit the Tj_max during PC test.